This invention relates to a method and apparatus for writing a flash EEPROM and, more particularly, to a method and apparatus for writing a flash EEPROM by a microcomputer.
A microcomputer incorporates a flash-type EEPROM (Electrically Erasable and Programmable Read-Only Memory of a flash-erasure type) to which program code and data have been written, and a monitoring circuit for monitoring program runaway and malfunction in the microcomputer. The monitoring circuit is control led by the microcomputer, which loads the program that has been written to the flash EEPROM into a RAM and then executes the program. The monitoring circuit is adapted to sense program runaway and malfunction in the microcomputer.
In a microcomputer of this kind, the microcomputer performs an operation (referred to as xe2x80x9cself-programmingxe2x80x9d) in which the content of the flash EEPROM is rewritten by the microcomputer itself. In such case it is necessary to control the operation of the monitoring circuit for the following reasons:
During normal operation, the microcomputer outputs a monitor signal or the like to the monitoring circuit periodically. If the monitoring circuit does not receive the monitor signal from the microcomputer upon elapse of a fixed period of time, the monitoring circuit outputs an abnormality detection signal to the microcomputer. Thus a reset signal for applying an interrupt to the microcomputer is output and processing such as initialization of the microcomputer etc. is executed. When self-programming is executed, however, the microcomputer performs an operation different from that specified by the program that has already been stored in the flash EEPROM. Consequently, there is no periodic input of the monitor signal to the monitoring circuit which, as a result, senses the microcomputer""s rewriting of the flash EEPROM content as program runaway or malfunction. In response, the monitoring circuit issues the abnormality detection signal that initializes the microcomputer (i.e., restarts the microcomputer by reset) or causes some other special operation to occur. This means that self-programming cannot be executed.
In a microcomputer having a monitoring circuit that monitors program runaway or malfunction, therefore, some contrivance is necessary to prevent the monitoring circuit from initializing (restarting) the microcomputer or from performing another special operation at the time of self-programming.
According to the prior art, the monitor signal that the microcomputer outputs to the monitoring circuit when a normal operation other than self-programming is being performed is halted when the microcomputer executes self-programming. Specifically, there is a prior-art technique to input a dummy monitor signal, instead of the above-mentioned monitor signal, to the monitoring circuit from an external device, thereby exercising control that prevents the monitoring circuit from generating the abnormality detection signal.
An example of such control is performed by a control apparatus disclosed in, e.g., the specification of Japanese Patent Laid-Open (KOKAI) Publication JP-A-7-271634. The control apparatus includes a microcomputer for executing a control program, a reset circuit for monitoring a program-runaway monitoring signal and applying a reset signal to the microcomputer at the time of program runaway, a flash EEPROM in which various data, which includes the control program executed by the microcomputer, and a program for rewriting this program and data have been stored, and a rewrite unit for writing new data to the flash EEPROM, wherein the control apparatus is provided with a signal input circuit for externally applying the microcomputer-runaway monitoring signal to the reset circuit during the writing of new data and programs to the flash EEPROM by the rewrite unit.
However, in the course of investigations toward the present invention, the following problems have been encountered.
This conventional arrangement for inputting a dummy monitor signal to the monitoring circuit from an external device to thereby perform control so as to prevent the abnormality detection signal from being generated by the monitoring circuit gives rise to some problems, set forth below.
The first problem is that it is necessary to add on external circuitry for the purpose of externally generating the dummy monitor signal. These leads to a greater number of component parts.
The second problem is that since the dummy monitor signal is input from the outside, noise is propagated with the input signal, leading to the possibility of unstable operation.
Accordingly, an object of the present invention is to provide a method and apparatus that make it possible to execute self-programming without a monitoring circuit shutting down or initializing (restarting) a microcomputer or causing some other special operation to occur at execution of self-programming, namely rewriting of the content of a flash EEPROM via the control operation of the microcomputer.
Further objects of the present invention will become apparent in the entire disclosure.
According to an aspect of the present invention, there is provided a method of controlling writing of a non-volatile memory electrically writable by a microcomputer,
wherein when content of an electrically writable non-volatile memory for storing programs and data is rewritten through self-programming via control by the microcomputer, a monitoring circuit for monitoring runaway or malfunction of a program executed by the microcomputer performs control to inhibit output of an abnormality detection signal from the monitoring circuit based upon values of an externally entered write-enable signal for enabling writing of the non-volatile memory and of a monitoring-circuit operation-control signal output from the microcomputer,
thereby making it possible to rewrite the content of the non-volatile memory by the self-programming without shutting down or initializing the microcomputer.
Typically, the electrically writable non-volatile memory comprises a flash EEPROM.
In this case, a control apparatus has a flash EEPROM for storing programs and data, a monitoring circuit for monitoring program runaway and malfunction, and a microcomputer, the apparatus executing an operation (referred to as xe2x80x9cself-programmingxe2x80x9d) for rewriting the content of the flash EEPROM via control by the microcomputer, the monitoring circuit having means, to which are input an externally entered flash EEPROM write-enable signal and a monitoring-circuit operation-control signal output from the microcomputer, for controlling output/suppression of an abnormal detection signal based upon values possessed by these signals, wherein when the operation for rewriting the content of the flash EEPROM is executed via control by the microcomputer, the monitoring circuit makes it possible to execute the operation for rewriting the content of the flash EEPROM without shutting down or initializing the microcomputer.
According to a second aspect of the present invention, there is provided a control apparatus having at least a flash EEPROM for storing programs and data, a monitoring circuit monitoring program runaway and malfunction, and a microcomputer, the control apparatus executing self-programming, i.e., rewriting the content of the flash EEPROM via control performed by the microcomputer. The monitoring circuit comprises means, to which are input an externally entered flash EEPROM write-enable signal and a monitoring-circuit operation-control signal output from the microcomputer, for controlling output/suppression of an abnormal detection signal based upon values possessed by these signals; wherein when rewriting of the content of the flash EEPROM is executed via control by the microcomputer, the monitoring circuit enables to rewrite the content of the flash EEPROM without shutting down or initializing the microcomputer.
In a specific embodiment herein, the monitoring circuit comprises:
a watchdog timer for outputting the abnormality detection signal; and
means, to which are input the externally entered flash EEPROM write-enable signal and the monitoring-circuit operation-control signal output from the microcomputer, for exercising control so as to inhibit the watchdog timer from outputting the abnormality detection signal.
According to a third aspect of the present invention, there is provided a control apparatus comprising: a flash EEPROM for storing programs and data; a microcomputer; and a monitoring circuit having a watchdog timer,
wherein in a case where the watchdog timer receives a monitor signal from the microcomputer, resets its count, starts counting a clock and is supplied with the monitor signal from the microcomputer before attaining a predetermined count, the watchdog timer resets its count and starts counting the clock again; and in a case where the watchdog timer receives the monitor signal from the microcomputer, resets its count, starts counting the clock and the attains the predetermined count without input of the monitor signal from the microcomputer, the watchdog timer outputs an abnormality detection signal;
content of the flash EEPROM being rewritten via a control operation performed by the microcomputer;
the monitoring circuit having control means, to which are input an externally entered flash EEPROM write-enable signal and a monitoring-circuit operation-halt signal output from the microcomputer, for exercising control so as to inhibit the watchdog timer from outputting the abnormality detection signal when the monitoring-circuit operation-halt signal is active;
wherein when rewriting of the content of the flash EEPROM is executed via control by the microcomputer, the monitoring circuit enables to rewrite the content of the flash EEPROM without outputting the abnormality detection signal to the microcomputer and, hence, without shutting down or initializing the microcomputer.
In a specific embodiment herein, the control means is capable of setting the monitoring-circuit operation-halt signal from an inactive state to the active state only when the externally entered flash EEPROM write-enable signal is active.
According to a fourth aspect of the present invention, there is provided a microcomputer internally incorporating: a flash EEPROM for storing programs and data; a processor; a monitoring circuit having a watchdog timer, wherein in a case where the watchdog timer receives a monitor signal from the processor, resets its count, starts counting a clock and is supplied with the monitor signal from the processor before attaining a predetermined count, the watchdog timer resets its count and starts counting the clock again; and in a case where the watchdog timer receives the monitor signal from the processor, resets its count, starts counting the clock and the attains the predetermined count without input of the monitor signal from the processor, the watchdog timer outputs an abnormality detection signal; and
peripheral circuitry.
Content of the flash EEPROM is rewritten via a control operation performed by the processor.
The monitoring circuit has control means, to which are input an externally entered flash EEPROM write-enable signal and a monitoring-circuit operation-halt signal output from the processor, for exercising control so as to inhibit the watchdog timer from outputting the abnormality detection signal when the monitoring-circuit operation-halt signal is active; wherein when rewriting of the content of the flash EEPROM is executed via control by the processor, the monitoring circuit makes it possible to rewrite the content of the flash EEPROM without outputting the abnormality detection signal to the processor and, hence, without shutting down or initializing the processor.
Other features and advantages of the present invention will be apparent from the following description taken in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the figures thereof.